According to the schedule, the first Ph.D. student will be in charge of the following tasks :
1) 1-22 Preliminary design and evaluation of the SDA architecture
2) 1-31 Determination of the Interoperation Rules
3) 1-31 Research of the optimal approach for Interoperability of the DME, transponder, and WBR
4) 2-11 Design of the DME SDA module with initial interoperation
5) 2-44 Performance evaluation of the system including reliability, robustness, and power savings
6) 3-14 Assessment of infrastructure external to SDA’s
7) 3-23 Evaluation of dynamic tests from Aircraft data using individual SDAs
8) 3-33 Integration of WBR with DME and transponder
9) 4-13 Analysis of the full system interoperability
The objective of this student’s project is to develop completely real and simulated robust receiver demodulation modules suitable for the SDR transceiver. He will closely collaborate with the other members of the research team and he will use a part of the research done by the Master’s and trainee students in order to fulfill his project’s goals. The main goals of the first Ph.D. student’s work are the following :
During the first year, the Ph.D. student will focus on the development of various algorithms to demodulate the downconverted signals pertinent to Transponder, DME, and WBR. These algorithms will include, among other important aspects, the development of simulation of reception scenarios. This work will include a very strong theoretical background of algorithms of DME and Transponder including : fidelity, accuracy, range and data streams. He will be very active also in the real-time implementation of the developed algorithms and he will do a detailed evaluation of the obtained performance. He will compare the results obtained in simulation with those obtained with real data responses of stock DME, and Transponder units, (and WBR (UAT) units if available).
The second year will be first dedicated to the study of the unit receiver modeling, module testing, evaluation and primitive intial tests of interoperability. Where possible the testing will take advantage of simulation.The Ph.D. student will dedicate the last part of the year to the real-time implementation and integration of the digital signal processing benefits to performance, reliability, power savings, robustness and preliminary documentation. He will analyse and compare the performance obtained with real data of those obtained in simulation.
The third year will be dedicated to base band drivers required to drive the transmitter and receiver part of the transceiver, and any module differences required by the direct conversion transceiver (and will know of the work of the second doctoral candidate). He will analyse and investigate the impact of the use of the combined SDR version transceiver for the intended application and the module interoperability of the direct conversion transceiver in the fully assembled configuration. This research work will include a theoretical analysis, simulation and real experimentation.