123- L1 and L5 SBAS Signals Generation in VHDL – Implementation in a FPGA

RESPONSIBILITIES OF THE CANDIDATE : The main objective of this 6 month internship will be to implement in VHDL the generation of the SBAS signals for the hybrid GNSS signal simulator. The work will start with a study of the SBAS system. SBAS signals will be simulated and validated. The generation message will be finally designed and coded in VHDL. Next, it will be implemented in a FPGA. Tests will be conducted and the generation procedure will be validated. Comparisons of the performances obtained in simulation and in real time will also be performed. The SBAS signals that will be considered are the ones corresponding to the L1 and L5 frequencies. The intern student will support also the other members of the research team by means of real-time experiments or whenever his help would be needed. He will also work on data formatting necessary for signal processing and for a better coherence between simulation and real-time tests.

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