A la recherche d’un étudiant en traitement des signaux dans le cadre du projet :
AVIO 601 – Interference Mitigation in Satellite Communication
Lien : http://lassena.etsmtl.ca/spip.php?rubrique29#1125
RESPONSIBILITIES OF THE CANDIDATE:
According to the schedule, the fourth Ph.D. student will be in charge of the following tasks:
1) 1-11 In-depth literature review of SatCom RFI mitigation techniques
2) 1-21 Study of SatCom standards and potential RFI
3) 1-31 Preliminary design of mitigation module architecture
4) 1-41 Evaluation of the mitigation technique impact
5) 2-11 Study of interoperability among different mitigation techniques
6) 2-21 Optimization of RFI rejection factor
7) 3-11 Planning of RFI mitigation module integration on a hardware platform
8) 3-22 In-field tests of RFI mitigation module alone
The objective of the research activities of this Ph.D. student will be to design SatCom RFI mitigation techniques in order to increase the robustness of SatCom receivers. The student will actively collaborate with the other members of the research team in order to develop a full prototype able to mitigate or cancel RFI disturbing the satellite communication link:
The first year, the student will design effective RFI mitigation techniques. The first step will be to acquire the required theoretical background by performing an in-depth literature review of state-of-the-art RFI mitigation techniques, such as adaptive filtering techniques, blanking techniques, multiuser and multichannel processing, etc. Then, a preliminary software implementation and comparison of the candidate mitigation techniques will be performed.
In the second year, the student will finalize the design of the mitigation module. His/her research activities will focus on the design of a hybrid mitigation software module, which incorporates and combines multiple mitigation techniques. The performance of this module will be thoroughly evaluated in order to identify the strengths and weaknesses of the hybrid approach. An optimization and full characterization of the developed RFI mitigation module will be carried out for interference rejection factor optimization.
During the third year, the student will provide support for the integration of the module into an FPGA-based hardware prototype. Final hardware optimizations of the RFI mitigation module may also be required to efficiently use the hardware resources, as well as to guarantee the full compatibility with rest of the hardware equipment. Finally, the hardware module implementing the mitigation techniques will be tested in operational environments.
